1. Field
The present disclosure relates generally to high-speed data communications interfaces, and more particularly, signaling in multi-wire, multi-phase data communication links.
2. Background
Manufacturers of mobile devices, such as cellular phones, may obtain components of the mobile devices from various sources, including different manufacturers. For example, an application processor in a cellular phone may be obtained from a first manufacturer, while the display for the cellular phone may be obtained from a second manufacturer. The application processor and a display or other device may be interconnected using a standards-based or proprietary physical interface. For example, a display may provide an interface that conforms to the Display System Interface (DSI) standard specified by the Mobile Industry Processor Interface Alliance (MIPI).
Higher frequency components of a high-speed signal traveling through a channel can be significantly attenuated due to channel bandwidth limitations and the degree of attenuation may correlate to the frequency of the signal. The losses of high frequency components can cause inter-symbol interference (ISI) and can increase jitter. A commonly-used compensation technique employs pre-emphasis at the transmitter, which may also be referred to as feed-forward equalization (FFE). FFE can be employed in single-ended and differential line drivers, but has limited effect on other types of drivers.
In one example, a three-wire interface (C-PHY) defined by MIPI uses a trio of conductors rather than differential pairs to transmit information between devices. Each of the three wires may be in one of three signaling states during transmission of a symbol over the C-PHY interface. Clock information is encoded in a sequence of symbols transmitted on the C-PHY link and a receiver generates a clock signal from transitions between consecutive symbols. In a C-PHY interface, the maximum speed of the communication link and the ability of a clock-data recovery (CDR) circuit to recover clock information may be limited by the maximum time variation related to transitions of signals transmitted on the different wires of the communication link.
Accordingly, there is an ongoing need to improve signaling capabilities of multi-wire interfaces.